1. Field of the Invention
This invention relates generally to handling articles having intrinsic polar characteristics. More particularly, the invention relates to identifying the orientation of such characteristics within the articles and to sorting the articles into groups of the same orientation of the characteristics within the articles. The invention is of particular interest to the assembly of semiconductor chips, such as diodes. For instance, in the manufacture of varistors, it becomes necessary to group the diodes according to the orientation of their p-n junctions prior to the attachment of leads to the diodes.
The present invention is discussed with respect to sheet-diffused diode chips. However, it should be understood that any reference in the disclosure to this product is for illustrative purposes only, and that such reference is not intended to limit the scope of the invention.
2. Discussion of the Prior Art
Conventionally, semiconductor devices are formed in great numbers as individual units in a single wafer. The wafer is subjected to a series of processing steps. The number and the sequence of these steps vary, depending upon the complexity of the final product. Upon completion of the steps, the wafer is divided into the individual units. These units are commonly referred to as dice or chips.
Depending on the previous manufacturing steps, the chips may be complex integrated circuits or they may be simple diodes. One method of manufacturing diodes is to generate within the body of the wafer a single rectifying p-n junction parallel to the two major surfaces of the wafer. The junction separates two doped semiconductor regions or domains, each of opposite conductivity type with respect to the other. Each domain lies adjacent to and in contact with one of the major surfaces. The domains are formed by well known methods. For instance, impurities of one conductivity type, such as phosphorous are diffused from one surface into the semiconductor wafer which is comprised of single-crystal silicon material, predoped with impurities of the opposite conductivity type, such as boron.
The wafer then becomes a single, large diode. When both major surfaces of the wafer are metallized, they become the two terminals of the diode. Subsequent to the metallization in one of various conventional ways, the diode wafer is separated into a number of small diode chips. Each of these chips has diode characteristics since each chip includes its respective portion of the previously formed p-n junction between its two major surfaces. Diodes formed by the described process of uniformly diffusing impurities through the wafer to form a single large diode and then dividing the wafer into small diode chips are referred to as sheet-diffused diodes.
Handling the individual chips efficiently in further manufacturing operations becomes a concern because of the small size of the chips and their intrinsic polar characteristics. These further manufacturing operations include the attaching of leads to the metallized terminal areas on the two major surfaces of the chips and the encapsulation of the chips to protect them from environmental influences that could destroy or adversely affect their electrical characteristics. For some products, it may be desirable to know the orientation of the p-n junction within each of the diode chips before the diodes become encapsulated.
When, however, sheet-diffused diodes are separated from the wafer by either scribing and breaking or by sawing, their edges are substantially perpendicular between the two major surfaces. When both major surfaces of the diodes are coated with the same type of contact metal, the polarity of the diodes, meaning the orientation of the p-n junctions within the diode chips, is not readily ascertainable. In some prior art processes in which the orientation of the diodes has to be known to permit the diodes to be correctly assembled, electrical testing is used to determine the orientation of the diodes.
For instance, in a process for making a varistor, two diodes are assembled in parallel between two leads. However, for the varistor to have its desired characteristics, the polarities of the diodes are reversed with respect to each other. The assembly of the diodes presupposes knowledge about the orientation of the diodes.
In the past, these diodes have been assembled by a multi-station and multi-function apparatus. The apparatus receives the diode chips from a conventional vibratory feeder bowl. The chips vibrate in a single file along a track to a test point. At that point a probe is lowered toward the track. The probe contacts the chip located at the test point and performs a test to its polarity of its p-n junction. Depending on the outcome of this test, the chip is transferred either to one or another track. Since this test is performed on all chips in sequence, they become sorted into two groups depending on the orientation of the p-n junction in each of the chips.
The operation of such an assembly apparatus is, of course, complex. The apparatus executes many mechanical functions and requires many linkages. A malfunction in any of the linkages requires a total shutdown of the assembly operation. Consequently, the average hourly output of the apparatus is often decreased by downtimes. It is, therefore, desirable to simplify the operation of sorting the diode chips.